Design of the ATLAS phase-II hardware-based tracking processor
نویسندگان
چکیده
منابع مشابه
Development of a New Tracking System Based on CMOS Vision Processor Hardware, Phase II Prototype Demonstration
Intelligent transportation systems depend on being able to track vehicle operations and collect accurate traffic data. This project targets a hardware-based video detection system for real-time vehicle detection. To allow real-time detection, customized hardware implementation of the system is targeted instead on the traditional computer-based implementation of the system. The system includes f...
متن کاملDevelopment of a New Tracking System based on CMOS Vision Processor Hardware: Phase I
It is well known that vehicle tracking processes are very computationally intensive. Traditionally, vehicle tracking algorithms have been implemented using software approaches. The software approaches have a large computational delay, which causes low frame rate vehicle tracking. However, real-time vehicle tracking is highly desirable to improve not only tracking accuracy but also response time...
متن کاملNios II Processor-Based Hardware/Software Co-Design of the JPEG2000 Standard
JPEG2000 is a recently standardized image compression algorithm that provides significant enhancements over the existing JPEG standard. JPEG2000 differs from widely used compression standards in that it relies on discrete wavelet transform (DWT) and uses embedded bit plane coding of the wavelet coefficients [1]. Due to the bit-oriented processing techniques used in the standard, full implementa...
متن کاملThe Versatile Image Processor V. I. P. (Hardware Design)
This paper presentv the architecture of a medium-grain parallel processor well suited for image analysis. The processor, named V.I.P. is composed by clusters of 4 Intel i860 RlSC processors connected among themselves and to I/O units through a parallel bus in the industrial standard VME, a parallel custom Video Rus and a serial network. The processors operate concurrently on cluster and system ...
متن کاملEfficient Hardware Design and Implementation of Encrypted MIPS Processor
The paper describes the design and hardware implementation of 32-bit encrypted MIPS processor based on MIPS pipeline architecture. The organization of pipeline stages in such a way that pipeline can be clocked at high frequency. Encryption and Decryption blocks of data encryption standard (DES) cryptosystem and dependency among themselves are explained in detail with the help of block diagram. ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
سال: 2019
ISSN: 0168-9002
DOI: 10.1016/j.nima.2018.11.055